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Posted: Sunday, October 8, 2017 9:31 PM

Job Title FPGA Design-Verification EngineerJob Location Rochester, NYJob Code CS20170###-####0 Harris Corporation is a leading technology innovator, solving our customers' toughest mission-critical challenges by providing solutions that connect, inform and protect. Harris supports customers in more than 125 countries and has approximately $8 billion in annual revenue. The company is organized into four business segments: Communication Systems, Space and Intelligence Systems, Electronic Systems, and Critical Networks. Job Description: Responsible for research, design, and development of embedded systems in military radio productsResponsible for design verification using System Verilog or experience with Object Oriented programming with an interest in learning how to apply this to Universal Verification Methods(UVM).Analyzes requirements to determine feasibility of design within time and cost constraints. Consults with electrical engineers and other engineering staff to evaluate interfaces between hardware, programmable logic, software/firmware, and operational performance requirements of the overall system. Develops and conducts FPGA system testing procedures, programming, and documentation.Provide technical support to internal and external customers.Perform software/FPGA/hardware component integration.Conduct/participate in design reviews.Identifying, tracking and repairing defects. Qualifications: Bachelors degree in Electrical Engineering or Computer Engineering or SW Engineering or Computer Science6+ years of experience (4 years with an MS degree) in FPGA HDL development and/or real time embedded object oriented software developmentActive Secret U.S. DOD Security Clearance (or inactive for less than 2 years)This position requires the candidate to already possess an active DOD Secret clearance (or a DOD Secret clearance inactive less than 2 years which can be immediately reactivated), and to maintain the clearance.US citizenship is requiredFamiliarity with System Verilog based verification of digital designs4+ years of experience developing and verifying FPGA designs implemented in VHDL, Verilog, and/or System Verilog4+ years of experience in the overall FPGA development lifecycle including design, implementation, and verification3+ years of experience producing FPGA/SW development documents, such as design documents and test plans2+ years of experience with verification methodologies such as UVM/OVM, including System Verilog functional coverage and System Verilog languagesExtensive Universal Verification Methods (UVM) knowledge or experience is a plus Preferred Skills: Ability to quickly familiarize self with and modify existing designs to add new capabilitiesPerform Verilog/System Verilog/VHDL coding, timing analysis, constraint generation, test bench generation, test and integration of resultant programmable logic functionalityFamiliarity with Xilinx or Quartus toolset, test bench generation and simulation, ModelSimFamiliarity with code and process management tools such as SVN and DOORSFamiliarity with designs for high speed processor interfaces and properly applying timing constraints to themGood interpersonal and communication skillsDreamJobs. Category: Manufacturing, Keywords: Verification Engineer
Associated topics: analog, cadence, design engineer, engg, engineer, engineer i, engineer iii, ic, layout, semiconductor


• Location: Rochester

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